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jjb169's avatar
jjb169
Icon for Occasional Contributor rankOccasional Contributor
9 months ago

Agilex 7 I-Series "aocl diagnose acl0" error following OFS

Hello, I've been working through the Open FPGA Stack (OFS) guides to set up my Agilex 7 I-Series development kit for use with oneAPI. I've worked through prior SystemVerilog issues encountered by sw...
jchecmu's avatar
jchecmu
Icon for New Contributor rankNew Contributor
1 month ago

I understand. I am also in the midst of proposing my PhD thesis haha. It is cool to see another group using OFS, and I would be interested in having a chat :)

Yes, copy emif_loc.tcl and top_loc.tcl to update the pinouts for the device. The FIM and ASP should build and run with the few steps I listed in the most recent reply. The previous steps that I listed are not needed. 

jjb169's avatar
jjb169
Icon for Occasional Contributor rankOccasional Contributor
6 days ago

Best of luck with your preparation and studies! I'm more than happy to have a chat sometime as well, I would be interested to hear your experience with these tools and platforms, and all that you've used them for.

I've gone ahead and followed your brief three steps and am now building the FIM (fingers crossed) now that my schedule has calmed down a bit. I'll be sure to report back as to how things go, but I again greatly appreciate everything you've done!