Most RecentHPS ip configuration in platform designer for uart0 enabling in arria 10 socAgilex7m i have configure 4GB ddr linux is not booting. I got architect time failure error.Timings eMMCUnable to receive OUT packet on USB in device modeavalon mm stimulusAgilex 5/3 FreeRTOS Heterogeneous SMP SDK ReleaseGSRD for DE25-NanoAgilex 5 premium board - es version - boots with gibberish promptsS10 hps fpga2sdram bridge low speedSoC EDS, compile uboot for Arria 10 SoC
