Can anyone verify for me the following code for 32-bit calculator in verilog using FSM? 4 operation- +,-,*,/ Works on DVS protocol
7 years ago1.8KViews0likes1Comment- 7 years ago2.1KViews0likes1Comment
I try to connect HPS with FPGA part in SOC_DE1 but I get this error I wonder if you could please help with that?
7 years ago2.1KViews0likes3Comments- 7 years ago2.4KViews0likes3Comments
Hi, I am new to Qsys. I am able to read the data from memory mapped component from HPS but not able to write to the mapped component.
7 years ago1.6KViews0likes1Comment- 7 years ago6.2KViews0likes8Comments
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