Most RecentQuartus 17.1 with Triple Speed Ethernet IP core 17.1 on Arria 10. RGMII not working and I just found this errata stating the RGMII is not supported, but GMII and SGMII are: FB: 330493. Can anybody confirm?avalon-MM interface to AXI interface interconnectMGCLD + ALTERAD compatibility issues.Board Test System error "FPGA is not detected in the Jtag Chain"Cannot download Quartus - Gateway ErrorI have recently downloaded the Quartus Prime 18.1 (Lite edition) and the Cyclone devices individually. But when I try to open the 3 individual files with the Cyclone devices they will not open and the software wont let me create a new project.Hi, It is posible to suppress DRC rule in Design Assistant for certain signal or design unit?how to download quartus 18.1 for windows?Warning message when programming part: "210120 MAX 10 information is incomplete. The ISP clamp functionality will be disabled." What does this mean? How do you fix it?How to read USERCODE from FPGA?
