Most RecentIs SerialLite III IP supported in Cyclone10GX?Can I use RGMII with the TSE IP core on a Cyclone 10 GX?Intermittent DDR4 calibration failuresInterfacing Stratix 10 PMA with custom PCSDoes ATX PLL support Spread spectrum Clocking?Problems reading from Ethernet MAC via Avalon MM bridge to streaming PCIeSDI Decoder IP for MAX10 deviceCyclone IV GX SDI Multi-instances ReferenceIntel Opencl FPGA blocking channelThe email on the link provided at the end of this page is out of date. https://www.intel.com/content/dam/www/programmable/us/en/pdfs/literature/ds/digital_channelizer.pdf?wapkw=channelizer could I get an updated link?
