Most Recentpeak temp and time for 606-232-00 (EP3SE110F1152C2)GMII (MARVELL) with TSE MAC-Telnet not connectedFIFO problem with readingHow can be Generate Accurate 622.08MHz(For STM-4 application) clock in ArriaV PLL with the help of input clock 77.76 MhzInitial Data is missing in the receiver side of Stratix 10 Native PHYMigration of Altera SDP memory to Xilinx SDP Memory.Explanation on RX Bit slip in Stratix 10 TransceiversSir, I'm currently working with ALTGX and ALTGX_RECONFIG mega functions to develop SFPDP IP core but i'm not able to dynamically reconfigure the two instances. Do i need to generate mif file? Kindly reply Thanks in advanceDear Sir, just before 15 days we got ARRIA10GX development kit . 1.We connected bitec FMC HDMI connector RECEIVER sink to PC GPU GTX1050. and connected 4k tv to the transmitter side.Generic Serial Flash Interface : writing to EPCQ bigger than 256MB problem
