Most RecentFlex want Intel help do FA of FPGA ALCH-1AB269490003, MPN: EP4CGX50DF27I7NWhere do I get the Lite version of the Intel Soc FPGA Design Suite?S10 PCIEGEN3X16 的example 仿真疑问JAM STAPL player for MAX 10 device 10M25DCF256C7GDoes LVDS receiver clock pin need termination?HPS Linux in Putty will freeze after programming FPGA on DE1-SoCI can successfully run the design example from PCIe IP guide for A10 devkit, however when I exchang the onchip_memory2_0 component with my own it hangs the PCIe bus.请问，FPGA的差分ClK引脚，p管脚用作单端时钟输入或输出了，n管脚可否用作普通I/O，还是必须空着？如果不用空着，是否需要接地？谢谢I am trying to follow the DE10 Standard My_First_HPS guide to do the "Hello World!" example shown. I am having a error when I am trying to compile the Makefile. Firstly, I have write "make -f Makefile.mk" and I get "make: *** [my_first_hps] Error 193".partial reconfig process, when program the pr rbf to fpga through JTAG, it failed
