APaga1
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Re: When should we use hard external memory interface in the DDR3 SDRAM controller?
Thank you for your response @yoichiK_intel . Whenever I am enabling "Enable Hard External Memory Interface" in the DDR3 SDRAM Controller with UniPHY in the platform designer, I am getting a series of errors as shown in the screenshot. I feel that the default settings are going for a toss once I have enabled the option. I am looking for a reference design from Intel that has used this hard external memory interface so that I can get a better idea.When should we use hard external memory interface in the DDR3 SDRAM controller?
Hello, I am trying to use the NIOS II SIMPLE Socket Server design template to write data from a file to the SDRAM. Right now we are facing issue to fit the design along with our algorithm on to Cyclone V GT board. The resources are cramming up. Will the usage of hard external memory interface can improve our situation in any aspect? Under what circumstances to we get to see the benefits of the same? If possible, can I get any reference design that uses this hard memory controller?How to write data into the SDRAM present as a part of simple socket server that has NIOS processor?
Hello, I am new to the NIOS SBT. I am trying to customize the NIOS II Simple socket server design template to read the data from the files and write it to the SDRAM. I need help in the addressing the SDRAM. I have created a region in the linker script section of the BSP editor. But I feel that the offset addressing is not happening properly. Should we need to change any reset vector option present in the NIOS CPU IP? Regards, Avinash PagaTiming failure in the SDRAM of the NIOS Simple Socket Server
Hello, I am trying to use NIOS II Simple Socket Server design template where I have integrated our custom IP in the ethernet standard main system qsys file. When we are trying to compile, we are getting timing violations in the SDRAM that is present in the ethernet standard main system qsys. As this is something from the Intel, I am unable to interpret the nodes that I have located through the Timing analyzer GUI. I have used afi_clock as input clocks to our customized IP that I have integrated with NIOS. Kindly help. I am attaching some screenshots. The board that we are using is Cyclone V GT.System timestamp mismatch - NIOS II Simple Socket Server
I am trying to implement NIOS II Simple Socket Server on Cyclone V GT device (https://fpgacloud.intel.com/devstore/platform/16.0.0/Standard/nios-ii-simple-socket-server-ethernet-example-for-cvgt/ ). But when giving the run, I am facing the errors related to mismatch in the timestamp. There are two sopcinfo files for ethernet_standard_main_system in the downloaded project directory and only one sof file in the master_image. Which sof file should I choose to program the board and which sopc file should I use to create the project in NIOS SBT? I am attaching the related pics.Re: Auto Negotiation FAILED : Nios II Simple Socket server
Hello Eliath @Eliath_G_Intel , Thank you for your support. We have observed that the auto negotiation is passing at 1G speed and the naming conventions of TSE are according to what it is suggested in the KDB that you have sent. But unfortunately, the ethernet link is still not up. We are getting the below message in the NIOS console at the end: ******************************************************************************************** Simple Socket Server starting up [sss_task] Simple Socket Server listening on port 30 Created "simple socket server" task (Prio: 4) ******************************************************************************************** But still we could not establish a telnet session with IP: 192.168.1.234 and port 30. We are hardware engineers and we are finding it difficult to debug the software portion of the simple socket server. Can you please explain what can be a way to progress further? Thank You! Warm Regards, Avinash PagaCould not open connection to the host, on port 30: Connect failed (Nios II Simple Socket Server)
Hello all, I've been trying to implement Simple Socket Server for Cyclone V GT and I have been following the steps mentioned in the pdf by Intel. (https://www.intel.com/content/dam/www/programmable/us/en/pdfs/literature/tt/tt_nios2_tcpip.pdf) I have got the NIOS console as seen in the screenshot : But I went on to open TELNET session for 192.168.1.234 with port no.30 . I am unable to do so. I am unable to ping as well. Kindly help. Regards, Avinash Paga
