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SLabe
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Re: MCDMA example design Modelsim Simulation failing for Agilex
I just tried the new Questa Intel FPGA Edition. Same error: # Start time: 14:30:55 on May 13,2021 # ** Note: (vsim-3812) Design is being optimized... # ** Error: $MODEL_TECH/../intel/verilog/src/ctp_hssi_atoms.sv(39100): Module 'ctp_tile_encrypted' is not defined. # For instance 'ctp_tile_encrypted_inst' at path 'pcie_ed_tb.pcie_ed_inst.dut.dut.ast.inst.inst.maib_and_tile.z1565a' # ** Error: $MODEL_TECH/../intel/verilog/src/ctp_hssi_atoms.sv(39100): Module 'ctp_tile_encrypted' is not defined. # For instance 'ctp_tile_encrypted_inst' at path 'pcie_ed_tb.dut_pcie_tb.dut_pcie_tb.g_bfm.p_dut_ep.altpcietb_bfm_top_rp.g_bfm.u1.rp.inst.dut.inst.inst.maib_and_tile.z1565a' # Optimization failed # ** Note: (vsim-12126) Error and warning message counts have been restored: Errors=2, Warnings=0. # Error loading design2.2KViews0likes0CommentsRe: MCDMA example design Modelsim Simulation failing for Agilex
@RichardTanSY_Altera , were you able to reproduce my error? I did see online that simulation for MCDMA P-Tile PCIe may only be supported by Modelsim SE, PE and Questa from Mentor. Could this be the issue? If so, will the new Questa Intel FPGA Edition Beta work? (I'm waiting on a license to try) https://www.intel.com/content/www/us/en/programmable/documentation/xzr1589413426034.html#cot1589416902981 Thank you!2.2KViews0likes1CommentRe: MCDMA example design Modelsim Simulation failing for Agilex
Hi I'm using the following section of the UG for running the simulation: https://www.intel.com/content/www/us/en/programmable/documentation/nki1590181067003.html#pkj1592875121012 I do know the guide is out of date and an update is coming for 21.1... In Quartus 21.1 I generate the example design for Multi Channel DMA P-Tile for PCI Express everything left as is targeting the Agilex F-Series P-Tile ES0 development kit. I've tried with both "PIO using MQDMA Bypass mode" and "AVMM DMA" examples. One final note, I use ModelSim FPGA Edition for simulation. Thank you,2.2KViews0likes0CommentsMCDMA example design Modelsim Simulation failing for Agilex
Hi, when following the steps in UG for MCDMA example design in Quartus PE 21.1, I get the following error in Modelsim. # ** Error: (vsim-3033) Instantiation of 'ctp_tile_encrypted' failed. The design unit was not found. # Time: 0 ps Iteration: 0 Instance: /pcie_ed_tb/pcie_ed_inst/dut/dut/ast/inst/inst/maib_and_tile/z1565a File: $MODEL_TECH/../altera/verilog/src/ctp_hssi_atoms.sv Line: 39100 The rest of the design appears to compile correctly and error free. I'm using Windows 10.2.3KViews0likes7CommentsPlatform Designer: Unreasonable amount of virtual memory when running under Linux
For Quartus Pro 20.4 Under Windows 10 the tool uses about 2GB of memory and runs smooth. Under Linux it uses 20GB (!) and is essentially unusable. Anyone else experience this? Any recommended solutions? Thank you!1.4KViews0likes6Comments