raju1421
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[Agilex]:C++ Code not able to execute in board
Dear Experts, We are using EMMC as booting device and following the steps from below link https://www.rocketboards.org/foswiki/Projects/AgilexSoCWithEMMCStorageOnHPS Toolchain and compiling steps using from above link We have a simple c++ code but not able to execute in the board. Facing below error : ./output_filename: error while loading shared libraries: libstdc++.so.6: cannot open shared object file: No such file or directory Thanks & Regards Satrasala RajuSolved702Views0likes2CommentsBridge Communication Issues on Agilex SOC Custom Board
Dear Experts, I am reaching out for support regarding bridge communication issues on our custom board featuring the Agilex SOC (AGFB027R24C2I3E), which uses EMMC as the boot medium. Despite successfully initializing U-BOOT SPL 2023.07 and ATF v2.9.0, and enabling bridges via the "bridge enable" command, the board frequently stalls at the U-BOOT stage and occasionally undergoes an unexpected reset. Moreover, we are unable to establish communication with the FPGA through the HPS2FPGA and LWHPS2FPGA bridges. Thanks & Regards Satrasala Raju1.1KViews0likes4CommentsTroubleshooting HPS UART1 Print Output Issue on Developed Intel Agilex SOC Board
Dear Experts, We have developed a custom board utilizing the Intel Agilex SOC (AGFB027R24C2I3E). Currently, we are experiencing a challenge with HPS UART1 as we are unable to observe the print outputs. We have attempted to resolve this issue by modifying the Device Tree Source (.dts) and Device Tree Source Include (.dtsi) files. Despite these adjustments, the problem still persists. Could you please provide guidance or suggestions on how to troubleshoot this issue? Your expertise in this matter would be greatly appreciated. Thank you for your assistance. Regards Satrasala Raju1.1KViews0likes2Comments[AGILEX]:ARMDS ERROR(ITR205-TAD59-NAL31)
Dear Experts, We are currently using a custom board that utilizes the Agilex SOC (AGFB027R24C2I3E) and an EMMC as the booting device. For booting from RAM, which is necessary for the detection of the MMC flash, we are employing the ARMDS Debugger. During this process, we have encountered an error that we are unable to resolve. The details are as follows: Debugging Process: The debug server starts and connects successfully to the running target Cortex-A53_SMP_0. The execution stops in EL3h mode at EL3:0x00000000FFE00000 on core Cortex-A53_0 (ID 0). Error Encountered: While executing the command restore "u-boot-socfpga/spl/u-boot-spl-dtb.bin" binary 0xFFE00000 in /home/ubuntu/Workspace/rpu_emmc_uboot/run-u-boot.ds, the following error occurs: ERROR(ITR205-TAD59-NAL31). The system is unable to restore the image, and the download of 150,051 bytes to address EL3:0x00000000FFE00000 fails. This failure occurs while writing a block of 4,096 bytes to the same address. The operation times out, awaiting the completion of the execution operation. Following this, the debugger disconnects from the stopped target Cortex-A53_SMP_0, and the debug server shuts down. Given these details, we seek your expert advice and support in resolving this issue. Thank you for your assistance. Regards Satrasala Raju807Views0likes1CommentRe: [Agilex}:Issue with Ping Command on I210-T1 Ethernet Server Adapter
Hi Intel Communities, Thank you for your response. Here are the details you requested: Intel Ethernet I210 Specifications: I am using an Intel Ethernet I210-T1adapter(1Gbe,Single Port,Copper,RTL Single) Driver Version for Ethernet and igb: The version of this driver is 6.1.38-243710-g50b63a962d02-dir. The firmware version is 3.25, 0x800006eb. Kernel Version: The Linux kernel version I am currently running is 6.1.38-243710-g50b63a962d02-dirty. Thanks & Regards Satrasala Raju1.8KViews0likes0CommentsRe: [Agilex]:bridge configuration invalid in PCIe
Hi Intel Communities, Thank you for your response. Here are the details you requested: Intel Ethernet I210 Specifications: I am using an Intel Ethernet I210-T1adapter(1Gbe,Single Port,Copper,RTL Single) Driver Version for Ethernet and igb: The version of this driver is 6.1.38-243710-g50b63a962d02-dir. The firmware version is 3.25, 0x800006eb. Kernel Version: The Linux kernel version I am currently running is 6.1.38-243710-g50b63a962d02-dirty. Thanks & Regards Satrasala Raju2KViews0likes0Comments[Agilex]:bridge configuration invalid in PCIe
Dear Intel Support Team, We are encountering a problem in our Agilex SOC Development Kit, which is connected to an I210-T1 Ethernet Server Adapter. Please find the below prints [ 0.147739] altera-pcie a0000000.pcie: host bridge /soc/bridge@80000000/pcie@200000000 ranges: [ 0.147799] altera-pcie a0000000.pcie: MEM 0x0090000000..0x009fffffff -> 0x0000000000 [ 0.147846] altera-pcie a0000000.pcie: port_conf_stat_off =14000 [ 0.148076] altera-pcie a0000000.pcie: PCI host bridge to bus 0000:00 [ 0.148095] pci_bus 0000:00: root bus resource [bus 00-ff] [ 0.148113] pci_bus 0000:00: root bus resource [mem 0x90000000-0x9fffffff] (bus address [0x00000000-0x0fffffff]) [ 0.148186] pci 0000:00:00.0: [1172:0000] type 01 class 0x060400 [ 0.148257] pci 0000:00:00.0: enabling Extended Tags [ 0.148406] pci 0000:00:00.0: PME# supported from D0 D3hot [ 0.149540] pci 0000:00:00.0: bridge configuration invalid ([bus 00-00]), reconfiguring [ 0.149725] pci 0000:01:00.0: working around ROM BAR overlap defect [ 0.149740] pci 0000:01:00.0: [8086:1533] type 00 class 0x020000 [ 0.149797] pci 0000:01:00.0: reg 0x10: [mem 0x90000000-0x900fffff] [ 0.149868] pci 0000:01:00.0: reg 0x1c: [mem 0x90000000-0x90003fff] [ 0.149936] pci 0000:01:00.0: reg 0x30: [mem 0x90000000-0x900fffff pref] [ 0.150206] pci 0000:01:00.0: PME# supported from D0 D3hot D3cold [ 0.150642] pci_bus 0000:01: busn_res: [bus 01-ff] end is updated to 01 [ 0.150691] pci 0000:00:00.0: BAR 14: assigned [mem 0x90000000-0x901fffff] [ 0.150710] pci 0000:00:00.0: BAR 15: assigned [mem 0x90200000-0x902fffff pref] [ 0.150730] pci 0000:01:00.0: BAR 0: assigned [mem 0x90000000-0x900fffff] [ 0.150754] pci 0000:01:00.0: BAR 6: assigned [mem 0x90200000-0x902fffff pref] [ 0.150778] pci 0000:01:00.0: BAR 3: assigned [mem 0x90100000-0x90103fff] [ 0.150801] pci 0000:00:00.0: PCI bridge to [bus 01] [ 0.150817] pci 0000:00:00.0: bridge window [mem 0x90000000-0x901fffff] [ 0.150833] pci 0000:00:00.0: bridge window [mem 0x90200000-0x902fffff pref] [ 0.150930] pcieport 0000:00:00.0: enabling device (0000 -> 0002) Thanks & Regards Satrasala RajuSolved2.1KViews0likes3Comments