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KellyJialin_Goh
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Re: Processor nios v
Hi, As we do not receive any response from you on the previous question/reply/answer that we have provided. Please login to ‘https://supporttickets.intel.com’, view details of the desire request, and post a feed/response within the next 15 days to allow me to continue to support you. After 15 days, this thread will be transitioned to community support. The community users will be able to help you on your follow-up questions. p/s: If any answer from the community or Intel Support are helpful, please feel free to give best answer or rate 4/5 survey. Thank you. Regards, Kelly Jialin, GOHRe: DE10-Nano, IP UART, GPIO pins
Hi, Here are the screenshot examples to use UART to map to GPIO: 1)Exporting as conduit 2) Connect rx and tx to GPIO 3) Example of Pin Assignment assigning to board's GPIO with link of DE10 Nano user(page 29, table 3-10) manual: https://www.intel.com/content/dam/develop/external/us/en/documents/de10-nano-user-manual.pdf Thank you. Regards, KellyRe: Is it possible to run NIOSV through SDRAM ?
Hi, Attached below is a screenshot of the qsys connection between "dbg_reset_out" to "ndm_reset_in" for your reference. You may connect it as of below to the NIOS V ndm_reset_in , external sdram and jtag's reset. Thank you and looking forward to your feedback after trying the debugging steps. Regards, KellyRe: Is it possible to run NIOSV through SDRAM ?
Hi, Thank you for the information provided. Running NIOS V through external SDRAM should be possible. Could you try to make the connection between "dbg_reset_out" to "ndm_reset_in" ? I will attach a screenshot on this qsys connection. Also, could you try to use niosv-download command to try downloading elf to run the application and lowering the JTAG frequency to 6Mhz to check whether is it a RiscFree issue. Thank you, Regards, KellyRe: Is it possible to run NIOSV through SDRAM ?
Hi Himanshu, Unfortunately, we do not have a design example for External SDRAM running on NIOS V for your reference. Also, may you check whether the Debug Module reset for NIOS V is connected to the external SDRAM? I will attach a picture of an example for this qsys connection. Thank you and looking forward to your feedback. Thank you. Regards, Kelly
