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HAlex

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Joined 3 years ago

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Re: CONF_DONE pin failed to go high problem
Hello Nothing new to share. The problems occurred only on 2 boards and not reproduced anymore. Mayb had a local problem with USB blaster or power supply ? Best regards Alex
11 months ago Place FPGA Device
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Re: CONF_DONE pin failed to go high problem
Hello No, sof file download is not successful. It looks like the problem damaged somehow the FPGA and it is not reacting anymore to any FPGA download or flash burning attempt. Thank you. Alex
1 year ago Place FPGA Device
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Re: CONF_DONE pin failed to go high problem
Hello Actually this 0-ohm resistor is do connected on the board even according to the flash datasheet it can be left unconnected. Thank you. Alex
1 year ago Place FPGA Device
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Re: CONF_DONE pin failed to go high problem
Hello I am using Quartus Prime Version 21.1.0 Build 821 10/21/2021 SJ Standard Edition. I don't have an encryption. Tried to burn also with latest Quartus standalone programmer only with different verified jic and sof (only for FPGA download) files but without success. Is it possible that FPGA is damaged (as sof file not working)? Or it still can be related to possible corrupted contents of flash that somehow overcomes even FPGA only sof file download attempts? Thank you. Alex
1 year ago Place FPGA Device
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Re: CONF_DONE pin failed to go high problem
Hello The NCE pin is do connected to GND as shown in the attached PDF of first message. My questions as I posted: 1. Can it be that all this caused by jic files? 2. You think that maybe the issues I have are because of defected initial burning equipment like USB blaster or momentary problems in power supply that damaged 2 FPGA's? 3. You think that I can ignore these phenomenon based on fact that I have few hundreds of working boards (even they burned only once from JTAG, while all updates if were needed were done from serial port with .flash files) or I must dig in my design in searching design issues? Thank you Alex
1 year ago Place FPGA Device
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Re: CONF_DONE pin failed to go high problem
Hello Fakhrul 1. I tested with JTAG cable only 2 boards and with both of them have the same issue. Third board was burned in a different way - through remote update option (RS232 and not from JTAG). 2. I tried to burn 'damaged' boards with different validated jic files, also with simplified jic with empty project (just pins were defined) and even tried to download only sof file. 3. The screenshot of the message attached. Thank you. Alex
1 year ago Place FPGA Device
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Re: Unconnected inputs of Cyclone III
Hello I don't have any further questions - and already marked this issue as accepted solution (to assign weak pull up on input pins for any case). Thank you.
2 years ago Place FPGA Device
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Re: Unconnected inputs of Cyclone III
I will leave these pins defined as inputs (for any case) and will assign an internal weak pull up on them.
2 years ago Place FPGA Device
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Re: Unconnected inputs of Cyclone III
Hello The option in device and pin dialog is for unused pins. In my case I have a defined inputs, some of them are connected to the FPGA logic (but actually not used by Nios or not effect on any essential output). FPGA doesn't know that the inputs are going to be disconnected. My question is if I need to recompile my FPGA (and remove unconnected pins/define them as weak pull-ups) or simply do nothing and leave design as is without recompilation? Thank you. Alex
2 years ago Place FPGA Device
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Unconnected inputs of Cyclone III
Hello I am using EP3C40F484C8N FPGA in my board. As now I want to remove some components assembled on PCB and connected to the FPGA inputs I want to know what modifications must be done in my Quartus based FPGA design - like defining weak pull-ups on input pins, or simply removing these pins from the design or do nothing? 1. For inputs just defined as inputs but without connection to any logic inside FPGA. 2. For inputs defined and connected to the logic inside FPGA but this logic is not used. Thank you Alex
Solved
2 years ago Place FPGA Device
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