AqidAyman_Altera
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Re: Cyclone IV E(EP4CE30) FPGA JTAG and USB-Blaster
Dear Customer, I'm glad that your issue is resolved. I will continue to monitor this post for the next 5 days. If there are no further inquiries during this period, I will step back and allow the community to assist with any future follow-up questions. Thank you for engaging with us! Best regards, Altera Technical Support4Views0likes0CommentsRe: Agilex 5 BSDL Files
Hi Frank, I have an update to share with you. Your request for the BSDL file will be available by the end of next month. We are trying our best to accommodate this issue now. To let you know, the internal team is generating as many BSDL files as possible at the moment, including for the other device family as well. I appreciate your understanding.20Views1like0CommentsRe: IO speed limit while implementing high resolution PWM on Cyclone 10
No, unfortunately, you can't suppress the fitter error in Quartus. The fitter enforces a device's physical limit for LVDS outputs (e.g., 640 Mb/s). I guess that the error indicates a physical capability check of the I/O standard and is not a timing-only warning that can be silenced. Hence, if signal integrity and board routing allow, switch the pin I/O standard to a single‑ended standard (e.g., LVTTL/3.3V) so the fitter won’t apply the LVDS hard limit. You have already seen that this compiles (with timing warnings).8Views0likes0CommentsRe: Hard Reset Required After Each Boundary Scan Operation
Dear Customer, Since there has been no response for a few days now, I will step back and allow the community to assist with any future follow-up questions. Thank you for engaging with us! Best regards, Altera Technical Support5Views0likes0CommentsRe: Agilex 5 FPGAs D-Series Availability
Hi, As of today, there are only two devices that are available for the Agilex 5-D series. You can refer to this link: https://www.altera.com/products/fpga/agilex/5/d-series For more information on the product availability, you can reach out to your local Altera Authorized Distributor: https://www.altera.com/contact3Views0likes0CommentsRe: Cyclone IV E(EP4CE30) FPGA JTAG and USB-Blaster
Hi, Please connect to 2.5V VCCA even though the VCCIO of the banks where the configuration pins reside is 3.3V. For more information, you can refer to this Knowledge Base article: https://community.altera.com/kb/knowledge-base/can-i-pull-up-the-jtag-configuration-pins-tdi-tdo-tms-of-cyclone-iii-or-cyclone-/342454 Regards, Aqid14Views0likes2Comments