Why is the signal cmd_ready of the Temperature Sensor Intel® Stratix® 10 FPGA IP at high impedance state in simulation?

Description

The Temperature Sensor Intel® Stratix® 10 FPGA IP simulation model is not fully featured in the Intel® Quartus® Prime Pro Edition Software. The output signal cmd_ready is at high impedance state (cmd_ready = 'bz) .

Resolution

Currently, there is no simulation model for the Temperature Sensor Intel® Stratix® 10 FPGA IP.