Why is the internal serial loopback test failing in the F-Tile Low Latency 50G Ethernet IP design example?

Description

Due to a problem in the Quartus® Prime Pro Edition software version 24.3.1 and earlier, you may see internal serial loopback test failure for the F-Tile Low Latency 50G Ethernet Design Example due to a mismatch in the QSF pin assignments of the Design example project.

Resolution

To work around this problem in the Quartus® Prime Pro Edition software version 24.3.1 and earlier, locate the alt_e50_f_hw.qsf file in the Example Design project directory and modify the pin location assignments of the serial transceiver, QSFP control, and clock signal ports, as shown below.

# Pin & Location Assignments
# ================= =========
set_location_assignment PIN_R14 -to clk_ref
set_location_assignment PIN_CM29 -to clk100
set_location_assignment PIN_AC10 -to o_tx_serial[0]
set_location_assignment PIN_Y7 -to o_tx_serial[1]
set_location_assignment PIN_AC4 -to i_rx_serial[0]
set_location_assignment PIN_T1 -to i_rx_serial[1]
set_location_assignment PIN_AB11 -to o_tx_serial_n[0]
set_location_assignment PIN_AA8 -to o_tx_serial_n[1]
set_location_assignment PIN_AB5 -to i_rx_serial_n[0]
set_location_assignment PIN_U2 -to i_rx_serial_n[1]
set_location_assignment PIN_CM23 -to qsfp_rstn
set_location_assignment PIN_CP23 -to qsfp_lowpwr

This problem is fixed beginning with the Quartus® Prime Pro Edition software version 25.1