Why does the Intel® Arria® 10 fPLL IP generate the wrong phase shift?

Description

Due to a problem with the Intel® Quartus® Prime Edition Software version 17.1, you may see the fPLL IP for Intel®  Arria® 10 sets an incorrect phase shift. It generates double the desired phase shift.

Resolution

To work around this problem, set a phase shift to be half of what you require.

To check phase shift settings, use the TimeQuest Timing Analyzer command "derive_pll_clocks". It reports the actual hardware configuration.