Why does my Intel® Stratix® V GX ES Device, Native PHY design show the following error: 10G RX PCS param 'hd_pcs10g_rx_chnl_frmsync_mfrm_length' set to illegal 'mfrm_user_length'?

Description

The Native PHY does not support using the 10G PCS on Stratix® V GX ES devices.

Resolution

To work around this issue, use the Low Latency PHY or compile the design using Intel® Stratix® V GX production device.