Why does my Intel® Arria® 10 fPLL output an incorrect clock frequency or misaligned clocks?

Description

Due to a problem in Quartus® II version 15.0, an Intel® Arria® 10 fPLL may output incorrect clock frequencies or misaligned clocks in these circumstances:

Case 1: The output clock frequency may be incorrect after dynamic reconfiguration between integer and fractional modes.

Case 2: If the fPLL in core mode has multiple outputs, the output clocks may not be in phase.

Resolution

This problem is fixed in Intel® Quartus® Prime Software version 15.1.2 and later.