Why does failure happen when running a hardware test with an F-Tile Ethernet Multirate hardware design example on Intel Agilex® 7 FPGA I-Series Transceiver-SoC Development Kit?

Description

In parameter.tcl of the hardware design example file, loopback_mode is set to 0 by default. Users may encounter the errors below without an external loopback connection:

error: can not find channel named "    ERROR: RX and TX packet counts do not match 
"    while executing
"puts "\tERROR: RX and TX packet counts do not match \n"        `"
    (file "tests/ftile_eth_dr_test.tcl" line 1143)
    invoked from within
"source   tests/ftile_eth_dr_test.tcl"
    (file "main_script.tcl" line 45)
    invoked from within
"source main_script.tcl"

Resolution

User can modify line 19 of the parameter.tcl to enable internal serial loopback before the hardware test:

set loopback_mode 1

Or connect with an external loopback module or cable for hardware test.