Knowledge Base Article

Why does Agilex™ 7 FPGA M-Series Configuration via Protocol (CvP) PCIe link active time exceed 120ms?

Description

Due to a problem in the Quartus® Firmware, which consumes more time for configuration, the PCIe link active time for CVP use case of Agilex™ 7 M- Series devices AGM032 and AGM039 may exceed 120ms.

Resolution

This problem is scheduled to be fixed in Quartus® Prime Pro Edition Software 24.1.

Updated 3 months ago
Version 2.0
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