Why do I see the error "FPGA-to-HPS frequency is out of range" in Quartus® Prime Pro version 25.1?

Description

When using Quartus® Prime Pro version 25.1 with Agilex™ 5 FPGA devices, you may encounter the error message "FPGA-to-HPS frequency is out of range" when configuring the FPGA-to-HPS free clock.

Resolution

Starting with Quartus® Prime Pro version 25.1, the GUI has been updated to restrict the FPGA-to-HPS free clock frequency to a maximum of 125 MHz. This is the highest supported input frequency for this clock on Agilex™ 5 FPGA devices. Ensure that the clock frequency is set to 125 MHz or lower to resolve the error.