What System PLL frequency do the HDMI TX PHY FPGA IP and HDMI RX PHY FPGA IP require on Agilex™ 7 F-Tile devices?

Description

The HDMI TX PHY FPGA IP and HDMI RX PHY FPGA IP require a System PLL frequency of 900MHz on Agilex™ 7 F-Tile devices.

 

 

Resolution

This information will be added to a future edition of the HDMI FPGA IP User Guide.