Knowledge Base Article
Info (276007): RAM logic <RAM name> is uninferred due to asynchronous read logic
Description
In the Quartus® Prime software, RAMs can only be inferred if the read logic is synchronous.
You may also see uninferred RAMs with this message if
- the read address is registered but has a preserve attribute attached to it.
- the read address is registered but has a fast_input_register assignment and is implemented as an IO register.
Resolution
To infer your RAM make sure that the read logic is synchronous and the read address register can be implemented in the RAM.
Updated 1 month ago
Version 3.0No CommentsBe the first to comment