Error: The specified Memory clock frequency exceeds the Memory device speed grade of 533.333 MHz. Please increase the Memory device speed grade (in Memory Parameters tab) or decrease the Memory clock frequency.

Description

You may see the above error when generating a Stratix IV DDR3 UniPHY controller in the Quartus® II software version 13.1 or later. There is a new frequency check in the MegaWizard™ Plug-in Manager IP GUI that prevents users from running the interface faster than the maximum supported frequency. If you specify the maximum supported frequency with more than 3 decimal places (i.e. 533.3333MHz), it will lead to the above error.

Resolution

The workaround is to limit the DDR3 Memory clock frequency in the PHY Settings tab of the MegaWizard™ Plug-In Manager to three decimal places.

Updated 6 days ago

Version 3.0

FPGA Dev Tools Quartus II Software

Stratix® IV FPGAs

troubleshooting

Knowledge Base Article

Error: The specified Memory clock frequency exceeds the Memory device speed grade of 533.333 MHz. Please increase the Memory device speed grade (in Memory Parameters tab) or decrease the Memory clock frequency.

Description

Resolution