Do DDR5 or LPDDR5 memory interfaces for Intel Agilex® 5 and Intel Agilex® 7 FPGA devices support mailbox commands to all channels for multichannel instances?

Description

For Intel Agilex® 5 FPGA and Intel Agilex® 7 FPGA in Intel® Quartus® Prime Pro Edition Software version 23.3, DDR5 2x16 and LPDDR5 2x16 EMIF IP mailbox command "GET_MEM_INTF_INFO" returns 1.  All mailbox commands can only access CH1 of the interface.

Resolution

This feature enhancement is available beginning with Intel® Quartus® Prime Pro Edition Software version 23.4