Are the guidelines to place K and Kn pins for QDRII/ SRAM interface when implementing the interface with UniPHY based IP different from the ones for ALTMEMPHY based IP?

Description

Yes, the guidelines to place K and Kn pins for QDRII/ SRAM interface are different for ALTMEMPHY and UniPHY based IPs.

As per the guidelines in the External Memory Interface Handbook, K and Kn pins should be placed on DQS and DQSn pins of the write data group when implementing QDRII/ SRAM interface.

Altmemphy based QDRII/ SRAM IP required you to place K and Kn pins on DQS and DQSn pins of the write date group respectively.

QDRII/ SRAM interface implemented with UniPHY based IP does not have this restriction. K and Kn pins can be placed on DQ pins as well as DQS and DQSn pins of the write data group. Make sure the pins are differential pin pair.

Resolution

The Handbook will be fixed to reflect this guideline in the future release.