Agilex™ 7 I/O Bank 2D’s pin doesn’t have output when with HPS instantiate.

Description

This can be observed when the HPS first boot flow is executed and the I/O Bank 2D differential pin doesn’t have output.

This is because the RAM Repair occurs twice, once in the HPS periphery bitstream and again in the FPGA Core bitstream. If the RAM Repair is applied when the IOSSM firmware is running, the IOSSM firmware either crashes or goes to exception.

Resolution

To work around this problem, upgrade to version 23.3 Intel® Quartus® Prime Pro Edition.