# FATAL ERROR while loading design during simulation using Mentor Graphics ModelSim-Altera

Description

If you attempt to simulate, using the Mentor Graphics ModelSim-Altera software, a VHDL design that contains a Low Latency PHY megafunction with a 10 Gbps datapath, simulation fails with errors similar to the following:

# ** Fatal: Error occurred in protected context. # Time: 0 ps Iteration: 0 Instance: /test_tst/test_inst/test_inst/<protected>/<protected>/<protected> File: nofile # FATAL ERROR while loading design # Error loading design