Forum Discussion
Altera_Forum
Honored Contributor
13 years agoAlright, so i'm using the MM templates from altera now. I added the write master to SOPC and linked the Master to the SRAM. Now I want to control the "conduits" from a VHDL entity. What I see is this:
https://www.alteraforum.com/forum/attachment.php?attachmentid=6634 Can I just make a VHDL file and port map to this master_template_0 component or do I have to use the write_master component?