Forum Discussion
Deshi_Intel
Regular Contributor
6 years agoHi Lay Foon,
I will be covering for Wani as she is out of office.
Sure, I will be looking forward to hear your test result update on swapping the bad unit on good board.
You mentioned a lot about Jabil diag test failing result but it's unclear to me to help isolate which design block inside FPGA maybe failing.
- Can you elaborate further on customer failure symptom ?
- What protocol test is being run ?
- Which FPGA IP block is being used ?
- Which FPGA internal signal that customer monitor that show the test failure ?
Thanks.
Regards,
dlim