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Altera_Forum
Honored Contributor
15 years agowhat is the use of rClk[1..0]?
Hi all, What does the rClk[1..0] do in the system? the rClk[1] value is not used in the DE2_D5M demos but the register is added by 1 every clock cycle. The rClk[0] is then inverted from 0 to 1 ...
Altera_Forum
Honored Contributor
15 years agoThanks, I see. But why does the design need to add 1 bit to the register? It just inverts the high signal to low.