Forum Discussion
Altera_Forum
Honored Contributor
10 years agoHello,
I have tried what you mentioned above. Firstly I used .sof file to configure my FPGA,which is similar to the document you mentioned above.Secondly,I copied the tse_tutorial.c file to my Nios II project, then I made some changes to fit my appliciation volatile int * tse = (int *) 0x12042000; printf("%x",*(tse + 2)); // Initialize the MAC address *(tse + 3) = 0x116E6001; *(tse + 4) = 0x00000F02; // Specify the addresses of the PHY devices to be accessed through MDIO interface *(tse + 0x0F) = 0x10; //*(tse + 0x10) = 0x11; // Write to register 20 of the PHY chip for Ethernet port 0 to set up line loopback //*(tse + 0x94) = 0x4000; // Write to register 16 of the PHY chip for Ethernet port 1 to enable automatic crossover for all modes *(tse + 0x90) = *(tse + 0x90) | 0x0060; // Write to register 20 of the PHY chip for Ethernet port 2 to set up delay for input/output clk *(tse + 0x94) = *(tse + 0x94) | 0x0082; // Software reset the second PHY chip and wait *(tse + 0x80) = *(tse + 0x80) | 0x8000; while ( *(tse + 0x80) & 0x8000 ); printf("PHY reset over"); But it seems that it failed to complete the Software reset the second PHY chip and wait . Can you tell me what i should solve this problem ?