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masterboyle's avatar
masterboyle
Icon for New Contributor rankNew Contributor
5 years ago

Using Library Models tutorial question

Hi, I'm trying to follow the "Using Library Models" tutorial VHDL versions and I'm getting VHDL syntax errors trying to synthesize the code in the document. I am just copying and pasting the code,...
SyafieqS's avatar
SyafieqS
Icon for Super Contributor rankSuper Contributor
5 years ago

Hi Boyle,


The error indicate a syntax error near text €, fix you vhdl at line stated in the error message. Check your brackets. For every open bracket you should have a close one.


Thanks,

Regards