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Altera_Forum
Honored Contributor
Honored ContributorUP VGA Pixel Buffer problem
Hello,
I'm trying to use vga pixel buffer as a data source for the vga controller in SOPC builder on a DE2 board using Quartus 9.1. I'm not really sure what I need to use with the pixel buffer. After some reading on the altera vga note, I found that it needs the SRAM to store pixel data. I think the problem is the SRAM, I managed to output pixels to my monitor but its only garbage. Could someone enlight me on how to connect SRAM and pixel buffer in SOPC builder? Note: VGA controller, pixel buffer and SRAM components come from the University Program IP Core. I put a screen shot of my SOPC build in attachment.26 Replies
Altera_Forumi'm very grateful for the VGA example posted earlier.
i use DE2 board as well and i'm attempting to connect at TRDB_LTM board using the VGA example, as according to the IPs used this module is supported. i made the necessary changes to the SOPC but i get a disorted image, as if i the LCD cannot synchronize with the signal. I use the configuration from the TRDB_LTM (Ephoto) project. any ideas?- Altera_Forum
OK, i got the issues fixed. apparently i was giving an incorrect clock to the LTM. now everything works.
- Altera_Forum
@renaudberube
hi where did u get the Uiversity IP core version 9.0? in altera's website, i only found for version 8.0 actually, i'm currently designing a JPEG decoder using SOPC builder from Quartus 9.0sp1 and i'm having difficulties in this VGA core, then i saw your thread and your design using pixel buffer. but as i said, the pixel buffer i have is the version 8.0. oh, and i'm planning to use the sdram as the buffer - Altera_Forum
For some reason, the Altera website only shows the 8.0 cores.
But changing 80 to 90 in the URL brought me to the 9.0 cores. ftp://ftp.altera.com/up/pub/university_program_ip_cores/90/ - Altera_Forum
@geffen:
i couldnt find the University Program IP in the url you gave me... but thanks anyway for your help. i've tried to use the pixel buffer for VGA core and even streaming adapter to change the number of bit per simbo from 10 bit per simbol to 8 bit per simbol. because in the VGA core, the output device is TRDB_LCM while the pixel buffer doesnt have that TRDB_LCM, only VGA connector and TRDB_LTM. but still i'm getting errors, like "the empty signal width of the source is 1, and the sink is 2". i dont know how to fix this... - Altera_Forum
Here is the link to the Video interface
ftp://ftp.altera.com/up/pub/university_program_ip_cores/90/video_out.zip you also need external clocks component (at least i used them) ftp://ftp.altera.com/up/pub/university_program_ip_cores/90/altera_up_avalon_external_clocks.zip extract it somewhere known go to SOPC Builder select tools->options go to ip search path category and Add the folder where you extracted Video_Out and video clocks - Altera_Forum
@geffen11:
thank you so much for the help. i got my problem solved ^_^ - Altera_Forum
does anyone have the datasheet for VGA core version 9.0??
- Altera_Forum
@geffen
thanks geffen
