Did anyone tried to use Test-Pattern Generator IP from Altera University Program (UP) Video IP cores? Does it produce still or moving picture? What is the maximum clock and Frame Resolution? I tried 1920x1080 @ 148,5 MHz, but Test-Pattern Generator IP did not produce anything valid according to Signal Tap II...

Do you have some other IP behind it which takes the picture made by TPG? Because the Avalon-ST protocol says, that the source should only send data, if the sink sets ready to 1. It is a non moving picture, which is either a Testpattern of many colorbars or a plain colorsetting.

Here is BDF screenshot attached. https://www.alteraforum.com/forum/attachment.php?attachmentid=7365 Did You mean, that I should use "video_test_pattern_0_avalon_generator_source_ready" ? I now noticed, that it is an input, although it is located on the output side of TPG BSF block. But leaving it unconnected or connecting in to "1" makes no difference. With Signal Tap II I see: https://www.alteraforum.com/forum/attachment.php?attachmentid=7366 Are You sure, that Test-Pattern Generator IP from Altera University Program can produce colorbars? Did You try it by Yourself? Can You advise any TPG with moving colorbars?

Like in [1] declared, you need to set ready to one, to start the data transfer, or to stop it. So I advice you to red [1]. Because of, that I think that the TPG is similar to the one of the Video Image Processing (VIP) Suite, I also post the link of the VIP-Spec in [2]. In [2] there is also a section about the Avalon-ST datatransfer. So my advice is to read this first and if you need a deeper detail, read [1]... [1] http://www.altera.com/literature/manual/mnl_avalon_spec.pdf [2] http://www.altera.com/literature/ug/ug_vip.pdf

I had no problems with TPG from Video Image Processing (VIP) Suite. Please see once again my previous post, I edited it.

Could you test, what is on the other wires of the Avalon-ST bus? And I've not seen any TPG with moving colorbars, sorry. If I need one in future, I will write me one... =)

Test-Pattern Generator IP from Altera University Program (UP) Video IP cores issues.

15 Replies

Altera_Forum
Honored Contributor
12 years ago
And thank you for the link, but I think a wrapping of this code takes longer than writing your own one.
For this complexity of TestPattern this should not be more than 2 days of work...
Altera_Forum
Honored Contributor
12 years ago
--- Quote Start ---
Ah, one more thing.

You have connected the reset input from the TPG to GND, but in the bdf the reset input looks like reset_n, what would say, that your TPG is always in the reset...

Check this please!
--- Quote End ---

That`s right! I followed the style of Reset in VIP TPG and overlooked , that UP TPG had a Reset of negative polarity.
Now its OK!
Altera_Forum
Honored Contributor
12 years ago
--- Quote Start ---

And thank you for the link, but I think a wrapping of this code takes longer than writing your own one.
For this complexity of TestPattern this should not be more than 2 days of work...
--- Quote End ---

OK, I'll wait for some time for the response from the author and if no reply then will try to adapt it by myself.
Altera_Forum
Honored Contributor
12 years ago
Taz1984, thank You for Your help!
Altera_Forum
Honored Contributor
12 years ago
No Problem, if you have further questions do not hesitate to ask... :)

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Test-Pattern Generator IP from Altera University Program (UP) Video IP cores issues.

15 Replies

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