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All I did with the board was turn it on and off and download to the FPGA
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Speaking from the experience of having destroyed an FPGA board in my initial experiences with FPGAs ...
I can understand why Terasic would have such a policy, as depending on what you downloaded, that would be enough to destroy your board.
For example, lets assume you are new to FPGAs and you did not appreciate the importance of pin assignments. If you created an HDL design and synthesized it for the DE1, then the default pin assignments would be random. Quartus warnings would indicate that you have not assigned pins, but as a new user, you may have ignored these warnings or not appreciated their relevance. If the random pin assignments caused pin conflicts on the board, then you can potentially destroy the FPGA.
So, did your design include pin assignments that matched the DE1 schematic?
Cheers,
Dave
Honored Contributor
