Forum Discussion
Altera_Forum
Honored Contributor
17 years agoSo, for an uncompressed configuration data, is there any correlation btwn the no of LEs used in my design and the actual footprint of my design on the configuration data? (I.e, if the compilation summary says I am using 10% of LEs, is it that only 10% of the configuration data is my actual design?)
Thanks for the replies, I am gaining better understanding of the FPGA.