Sir, I would like to design a SFPDP module that receive parallel data from F/o module . This is a part of a recorder. My question is how to proceed with Stratix IV board? Can i use ALTGX Transceiver for that? If so please do mention challenges.

Sir,

As you mentioned i done with single channel now, I was able to {Frame, encode,serialize in Transmitter} and{De-serialize, decode, de-frame the data in Receiver} correctly in simulation. But the problem arise when i'm using the hardware setup.

1.I'm using signal tap II analyzer for watching the signal real time

2. There are two FPGA inside my custom board and using one as TX and one as RX

3. I have done the sample code where i was using 8 bit data with control code K28.5

But i'm not able to receive the data properly. How to resolve the problem??

If there is any design example file kindly share here

Thanks in advance

Arya vijayan