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Altera_Forum
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16 years ago

Simple Verilog Question

Hello I am trying to make a simple multiplexer on the de2-70. I know there are many ways to do this but I was wondering why the following code does not do the task. Task: Read switch 17 if switch ...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
16 years ago

Thanks for the help

Those examples worked very well.

I assume you say using the clock to avoid glitches with the timing of the gates. I tried to write the code to use the 50MHz clk on the board for the clock to the mux so I wrote this code segment from the example you added..

module Lab1 (iCLK_50, iSW, oLEDR);

input [17:0]iSW, iCLK_50;

output [7:0]oLEDR;

reg[7:0]LedReg;

wire oLEDR;

always @ (posedge iCLK_50)

LedReg <= iSW[17] ? iSW[15:8] : iSW[7:0];

assign oLEDR = LedReg;

endmodule

but now I am getting the following error.

Error: Can't place multiple pins assigned to pin location Pin_AD15 (IOC_X49_Y0_N1)

Info: Pin iCLK_50[1] is assigned to pin location Pin_AD15 (IOC_X49_Y0_N1)

Info: Pin iCLK_50[2] is assigned to pin location Pin_AD15 (IOC_X49_Y0_N1)

Info: Pin iCLK_50[3] is assigned to pin location Pin_AD15 (IOC_X49_Y0_N1)

Info: Pin iCLK_50[4] is assigned to pin location Pin_AD15 (IOC_X49_Y0_N1)

Info: Pin iCLK_50[5] is assigned to pin location Pin_AD15 (IOC_X49_Y0_N1)

Info: Pin iCLK_50[6] is assigned to pin location Pin_AD15 (IOC_X49_Y0_N1)

Info: Pin iCLK_50[7] is assigned to pin location Pin_AD15 (IOC_X49_Y0_N1)

Info: Pin iCLK_50[8] is assigned to pin location Pin_AD15 (IOC_X49_Y0_N1)

Info: Pin iCLK_50[9] is assigned to pin location Pin_AD15 (IOC_X49_Y0_N1)

Info: Pin iCLK_50[10] is assigned to pin location Pin_AD15 (IOC_X49_Y0_N1)

Info: Pin iCLK_50[11] is assigned to pin location Pin_AD15 (IOC_X49_Y0_N1)

Info: Pin iCLK_50[12] is assigned to pin location Pin_AD15 (IOC_X49_Y0_N1)

Info: Pin iCLK_50[13] is assigned to pin location Pin_AD15 (IOC_X49_Y0_N1)

Info: Pin iCLK_50[14] is assigned to pin location Pin_AD15 (IOC_X49_Y0_N1)

Info: Pin iCLK_50[15] is assigned to pin location Pin_AD15 (IOC_X49_Y0_N1)

Info: Pin iCLK_50[16] is assigned to pin location Pin_AD15 (IOC_X49_Y0_N1)

Info: Pin iCLK_50[17] is assigned to pin location Pin_AD15 (IOC_X49_Y0_N1)

Info: Pin iCLK_50[0] is assigned to pin location Pin_AD15 (IOC_X49_Y0_N1)

I had a simlar error with the switch number 7 on the DE2-70 board and fixed it from this post:

http://www.alteraforum.com/forum/showthread.php?t=5851&gsa_pos=1&wt.oss_r=1&wt.oss=de2-70%20multiple%20pin%20assignment%20error (http://www.alteraforum.com/forum/showthread.php?t=5851&gsa_pos=1&wt.oss_r=1&wt.oss=de2-70%20multiple%20pin%20assignment%20error)

but it is not working in this case. I was wondering if anyone sees what I did wrong. Thanks for the help!