Forum Discussion

Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
17 years ago

SDRAM on DE2

Hi friends: I come up with a problem on DE2 board.In the SOPC builder,I set the clock of both SDRAM and CPU 50Mhz,when I download the software in Nios,it said "Verify failed between address 0...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
16 years ago

when I added the through-clock signal to the PLL we were able to get it working

(and I've always used the f version of the cpu). I'm not sure what your situation

is.