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Altera_Forum's avatar
Altera_Forum
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17 years ago

SDRAM on DE2

Hi friends: I come up with a problem on DE2 board.In the SOPC builder,I set the clock of both SDRAM and CPU 50Mhz,when I download the software in Nios,it said "Verify failed between address 0...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
16 years ago

Thanks - I ended up adding a second clock to the PLL, going straight through,

as suggested by the tutorial. That worked. Interesting though that a few years

ago you did not need to send the CPU clock through the PLL.

Now if I can get the Terasic ISP1362 (USB) IP to work with Quartus 9.0/9.1.