Forum Discussion
Altera_Forum
Honored Contributor
17 years agoHi.
@mmaharjan, that ADC is very very soft to waste a FPGA for it...just a simple microcontroller could do that job easily. But If you want to try that, build a counter, and get some high bit of this, to get the out clk in syncro & turn down the ADC clk freq. @mchitrakar Did you read about THDB_ADA (ADA) daughter board from Terasic ? Regards. Alberto.