Question about sample rate of audio codec WM8731 on DE2

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So, for the sample rate of 44.1 Khz, I need to divide 50 Mhz by 3 ( 16.667 Mhz ~ 16.9344 Mhz ) and set BOSR = 1 ?

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Yes, but you can't just divide a clock by 3 without violating duty cycle restrictions. You would need to use a PLL.

When using a PLL, set the wanted frequency in the PLL MegaWizard. The MegaWizard will take care of selecting the best multiplication/division.