Quartus II 14.0 (64bit) - vsim error 3170 - Could not find test vector

Hello,

I'm a rookie user of Quartus II suite and an entry-level VHDL developer.

After creating a project in which I used an Altera IP megafunction (a shift register), the University Program VWF won't work again. It states:

"Error: (vsim-3170) Could not find 'work.SIMPLEADDER_vlg_vec_tst'."

I'm writing code in VHDL, but I noticed that every time I try running a RTL simulation in University Program VWF the EDA Tool Format Setting switches to Verilog HDL by itself, whereas I select VHDL prior to beginning the simulation.

Does anybody have an idea about what is the problem? Consider that I was able to simulate without issues before creating and trying to simulate one project with an IP component.

Thank you in advance.