Programming the LCD on cyclone iii dev kit

Hello,

Am a newbie with verilog and i have been trying to write a verilog code to display some characters on the lcd module on the cyclone 3 board...any help will be appreciated...my code is posted below..is this a good starting point or am totally off:

module lcd_display (clk,lcd_rs, lcd_rw, lcd_e, lcd_code);

input clk;

//input user_dipswitch2;

//input user_dipswitch3;

//input [15:0]counter_out;

reg [15:0] count=0;

output reg lcd_rs ;

output reg lcd_rw ;

inout reg [3:0]lcd_code;

output reg lcd_e;

initial

begin

lcd_rs = 0;

lcd_rw = 0;

lcd_e = 0;

end

always @ (posedge clk)

// if (user_dipswitch2) //initialize lcd

begin

count = count + 1;

lcd_e = 1;

case (count)

16'h000f: lcd_code = 4'b0010; // function set

16'h001f: lcd_code = 4'b0010;

16'h0022: lcd_code = 4'b1100;

16'h0797: lcd_code = 4'b0000; // display on

16'h079f: lcd_code = 4'b1110;

16'h1692: lcd_code = 4'b0000; //clear display

16'h169a: lcd_code = 4'b0001;

16'he845: lcd_code = 4'b0000; //entry mode set

16'he84c: lcd_code = 4'b0110;

16'hf200: lcd_code = 4'b0100; // set CGRAM address;

16'hf20f: lcd_code = 4'b0110;

16'hffaf: lcd_code = 4'b1000; //set DDRAM address

16'hfffe: lcd_code = 4'b0110;

16'hffff: begin

lcd_rs = 1;

lcd_code = 4'b1111;

end

endcase

end

// always @ (posedge clk)

// if (user_dipswitch3)

// begin

// count = 0;

// lcd_rs = 1;

// lcd_code <= counter_out [15:12];

// lcd_code <= counter_out [11:8];

// lcd_code <= counter_out [7:4];

// lcd_code <= counter_out [3:0];

// end

//

endmodule