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Altera_Forum
Honored Contributor
8 years agoProblem with transferring data from different clock domains using dual_port_ram
Hello everyone, I want to transfer a frame from 143Mhz clock domain to 49Mhz clock domain to view the frames through vga, For a test i tried to transfer a vertical and horizontal white lines to ...
Altera_Forum
Honored Contributor
8 years agoHi,
“pll” entity is undefined in provided codes. Have you checked the simulation by using test bench? Let me know, if you need any further assistance. Best Regards Vikas Jathar (This message was posted on behalf of Intel Corporation)