Honored Contributor
Honored ContributorI managed to find a DE2 board from another student. I tried the TRDB-D5M camera with the example UP files for DE2 and they all worked!
- The Extra_D5M_Video_In worked fine apart from ouput is showing at slow frame-rate. - The Extras_Edge_Detection also is detecting the edges of whatever the camera is reading in. The only flaw is that the output display is upside down.. don't know why. So, we can say that the IP_Core_Demos are not fully DE2-115 compliant yet. The fact that no example SOPC design example 'Extra_D5M_Video_In' exists in DE2-115 folder should have been a hint to us I guess. Who writes these UP examples? Is it Terasic or Altera? I contacted Terasic but they say they can't help with the SOPC section, and told me to use their example verilog design file and SignalTap to sort it out myself. I'm bit annoyed by this. I thought I could get up and running quickly connecting the camera to the DE2-115 board using SOPC builder because I only bought this kit after reading the following in the UP literature "The video decoder converts raw video input from videoin chips on Altera DE2/DE2-70/DE2-115 boards, or Terasic’s 5 megapixel CCD camera, into packets that can be processed by the video-processing cores." Anyway I have to carry on with the DE2-115 and work using the verilog design file as AsValdr has suggested. I don't understand the verilog code fully. I think one potential mistake among many others is with the GPIO ports. DE-115 define the ports as
//////////// GPIO, GPIO connect to D5M - 5M Pixel Camera //////////
input D5M_D;
input D5M_FVAL;
input D5M_LVAL;
input D5M_PIXLCLK;
output D5M_RESET_N;
output D5M_SCLK;
inout D5M_SDATA;
input D5M_STROBE;
output D5M_TRIGGER;
output D5M_XCLKIN;
