Position-Counter VHDL in Quartus II question

I'm not sure I entirely understand the assignment...

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The counter has a 6 bit input

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what is it doing with that input? For me the only inputs a counter can have is a clock, an enable signal, and a direction. You could use a 6-bit input to load a new value, but then you need to know on what condition you will load this value. Or did you mean a 6-bit output?

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It counts up to 64 positions and then counts back down

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so it looks like a counter with automatic direction change.

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Whenever the counter equals something, it stores a 12 bit input into a position

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Is that "something" a constant, or another output? What 12 bit input? What's a position?

Now about your code:

USE ieee.std_logic_unsigned.all;

don't use that. It's non standard and will create problems and confusion in the future as you learn more vhdl. Use the standard ieee.numeric_std.all library instead, and use the unsigned type for your counter value instead of std_logic_vector.

Your code only counts up and not down. You should create an additional "direction" signal to say if it counts up or down, and change that signal when you reach the extreme values.

As for the rest, it depends on what the assignment really means.