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Altera_Forum's avatar
Altera_Forum
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13 years ago

please help

Hello all, Once more I came to ask help from the community. I have been trying, for the last couple of moths, to add the audio core to the DE2_NET provided project. (we do not use this board a...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
13 years ago

I think I have seen this error before. It will happen when two input clocks are on the same pll bank. (I am assuming you have the two or more PLLs in your design)

If you are using the same clock for two different PLLs, try and merge the two PLLs into one.

Hope this helps