New Contributor
Super ContributorI don't think it is a schematic problem since the simulation is fine.
Have you checked whether the design pass timing?
Try to debug design by using Signal Tap to check whether the waveform is correct.
New ContributorHello:
Thanks for your reply. I had tried a timing simulation using the University Program VWF simulator and there didn't appear to be a problem. I believe that may use the simulator you mentioned as its tool as well, but perhaps not. Similar timing and functional simulations and compilations of other mod-number counters using the same feedback (MOD-12 using the 8 & 4 FF outputs, etc.) produced correct counts and it doesn't appear to be a debounce problem as the input used for the DE10-Lite is a 3.3V Schmitt Trigger type. I found when slightly re-routing the wiring to bring it more directly to the 2's count FF (see below) that the count seemed to be correct on the DE10-Lite board. After that, I could not duplicate the problem again with either schematic. I am wondering if somehow the programming file was corrupted during my earlier tests. In each case, I used the BDF as the top-level and compiled the project, and then used the programming file generated after compilation. Perhaps when saving the project (or if not saving in the interim), something changed? Still a bit of a mystery.
